For example, when a new member joins a list, a welcome message is sent to that member. The welcome message is created from a template found by a URL associated with a template name and a context. Some standard placeholders can be defined in the template, and these will be filled in by Mailman when the welcome message is sent. The URL itself can have placeholders, and this allows for additional flexibility when looking up the content.
When Anne is subscribed to the mailing list, she sees this plain welcome message. You publish both the code of conduct and the welcome message pointing to the code on your website. Now you can tell the mailing list to use this welcome message instead of the default one. Generally, if a template is not defined or not found, the empty string is used. IOW, a missing template does not cause an error, it simply causes the named template to be blank.
Many, but not all, templates have their text wrapped at column This can result in a nicer looking result but can also break long URLs. Here are some examples. The URLs themselves can contain placeholders, and this can be used to provide even more flexibility in the way the template texts are retrieved.
When Mailman is looking for a template, it always searches for it in up to three contexts , and you can set the template for any of these three contexts: a mailing list, a domain, the site. Most templates are searched first by the mailing list, then by domain, then by site.
One notable exception is the domain:admin:notice:new-list template, which is sent when a new mailing list is created. Recipe lines containing MAKE are executed normally despite the presence of a flag that causes most recipes not to be run. Variable values of the top-level make can be passed to the sub- make through the environment by explicit request.
To pass down, or export , a variable, make adds the variable and its value to the environment for running each line of the recipe. The sub- make , in turn, uses the environment to initialize its table of variable values. Except by explicit request, make exports a variable only if it is either defined in the environment initially or set on the command line, and if its name consists only of letters, numbers, and underscores. Some shells cannot cope with environment variable names consisting of characters other than letters, numbers, and underscores.
See Choosing the Shell. Variables are not normally passed down if they were created by default by make see Variables Used by Implicit Rules. The sub- make will define these for itself. If you want to export specific variables to a sub- make , use the export directive, like this:. If you want to prevent a variable from being exported, use the unexport directive, like this:. In both of these forms, the arguments to export and unexport are expanded, and so could be variables or functions which expand to a list of variable names to be un exported.
You may notice that the export and unexport directives work in make in the same way they work in the shell, sh. This tells make that variables which are not explicitly mentioned in an export or unexport directive should be exported. Any variable given in an unexport directive will still not be exported. If you use export by itself to export variables by default, variables whose names contain characters other than alphanumerics and underscores will not be exported unless specifically mentioned in an export directive.
The behavior elicited by an export directive by itself was the default in older versions of GNU make. If your makefiles depend on this behavior and you want to be compatible with old versions of make , you can write a rule for the special target. This will be ignored by old make s, while the export directive will cause a syntax error. Likewise, you can use unexport by itself to tell make not to export variables by default.
Since this is the default behavior, you would only need to do this if export had been used by itself earlier in an included makefile, perhaps.
You cannot use export and unexport by themselves to have variables exported for some recipes and not for others. The last export or unexport directive that appears by itself determines the behavior for the entire run of make. The incrementation happens when make sets up the environment for a recipe. This variable, if defined in the outer-level makefile, is passed down through the environment; then it serves as a list of extra makefiles for the sub- make to read before the usual or specified ones.
This variable is set up automatically by make to contain the flag letters that make received. In response, it takes the flags from that value and processes them as if they had been given as arguments. See Overriding Variables. This is not usually useful to do. You probably do not care about this.
If you want your makefiles to be compatible with old make programs, use this technique; it will work fine with more modern make versions too. That variable is set only for compatibility; make does not interpret a value you set for it in any way. If you do put MAKEFLAGS in your environment, you should be sure not to include any options that will drastically affect the actions of make and undermine the purpose of makefiles and of make itself.
When the same sequence of commands is useful in making various targets, you can define it as a canned sequence with the define directive, and refer to the canned sequence from the recipes for those targets. The canned sequence is actually a variable, so the name must not conflict with other variable names.
Here run-yacc is the name of the variable being defined; endef marks the end of the definition; the lines in between are the commands. See Defining Multi-Line Variables , for a complete explanation of define. The first command in this example runs Yacc on the first prerequisite of whichever rule uses the canned sequence. The output file from Yacc is always named y. To use the canned sequence, substitute the variable into the recipe of a rule. You can substitute it like any other variable see Basics of Variable References.
Because variables defined by define are recursively expanded variables, all the variable references you wrote inside the define are expanded now. This is a realistic example, but this particular one is not needed in practice because make has an implicit rule to figure out these commands based on the file names involved see Using Implicit Rules.
In recipe execution, each line of a canned sequence is treated just as if the line appeared on its own in the rule, preceded by a tab. In particular, make invokes a separate sub-shell for each line. For example, using this canned sequence:. But it will echo the following two recipe lines. On the other hand, prefix characters on the recipe line that refers to a canned sequence apply to every line in the sequence.
So the rule:. It is sometimes useful to define recipes which do nothing. This is done simply by giving a recipe that consists of nothing but whitespace. You could also use a line beginning with a recipe prefix character to define an empty recipe, but this would be confusing because such a line looks empty. You may be wondering why you would want to define a recipe that does nothing. One reason this is useful is to prevent a target from getting implicit recipes from implicit rules or the.
You may be inclined to define empty recipes for targets that are not actual files, but only exist so that their prerequisites can be remade. However, this is not the best way to do that, because the prerequisites may not be remade properly if the target file actually does exist. See Phony Targets , for a better way to do this. These values are substituted by explicit request into targets, prerequisites, recipes, and other parts of the makefile. In some other versions of make , variables are called macros.
Variables can represent lists of file names, options to pass to compilers, programs to run, directories to look in for source files, directories to write output in, or anything else you can imagine. However, variable names containing characters other than letters, numbers, and underscores should be considered carefully, as in some shells they cannot be passed through the environment to a sub- make see Communicating Variables to a Sub- make.
Variable names are case-sensitive. It is traditional to use upper case letters in variable names, but we recommend using lower case letters for variable names that serve internal purposes in the makefile, and reserving upper case for parameters that control implicit rules or for parameters that the user should override with command options see Overriding Variables. A few variables have names that are a single punctuation character or just a few characters.
These are the automatic variables , and they have particular specialized uses. See Automatic Variables. Variable references can be used in any context: targets, prerequisites, recipes, most directives, and new variable values. Here is an example of a common case, where a variable holds the names of all the object files in a program:.
A dollar sign followed by a character other than a dollar sign, open-parenthesis or open-brace treats that single character as the variable name. However, this practice can lead to confusion e. One place where readability is often improved is automatic variables see Automatic Variables. There are two ways that a variable in GNU make can have a value; we call them the two flavors of variables.
The two flavors are distinguished in how they are defined and in what they do when expanded. The first flavor of variable is a recursively expanded variable. The value you specify is installed verbatim; if it contains references to other variables, these references are expanded whenever this variable is substituted in the course of expanding some other string.
When this happens, it is called recursive expansion. This flavor of variable is the only sort supported by most other versions of make. It has its advantages and its disadvantages. An advantage most would say is that:. A major disadvantage is that you cannot append something on the end of a variable, as in.
Actually make detects the infinite loop and reports an error. Another disadvantage is that any functions see Functions for Transforming Text referenced in the definition will be executed every time the variable is expanded.
This makes make run slower; worse, it causes the wildcard and shell functions to give unpredictable results because you cannot easily control when they are called, or even how many times. To avoid all the problems and inconveniences of recursively expanded variables, there is another flavor: simply expanded variables. The value of a simply expanded variable is scanned once and for all, expanding any references to other variables and functions, when the variable is defined.
The actual value of the simply expanded variable is the result of expanding the text that you write. It does not contain any references to other variables; it contains their values as of the time this variable was defined. See The shell Function. Simply expanded variables generally make complicated makefile programming more predictable because they work like variables in most programming languages.
They allow you to redefine a variable using its own value or its value processed in some way by one of the expansion functions and to use the expansion functions much more efficiently see Functions for Transforming Text.
You can also use them to introduce controlled leading whitespace into variable values. Leading whitespace characters are discarded from your input before substitution of variable references and function calls; this means you can include leading spaces in a variable value by protecting them with variable references, like this:. Here the value of the variable space is precisely one space. Since trailing space characters are not stripped from variable values, just a space at the end of the line would have the same effect but be rather hard to read.
If you put whitespace at the end of a variable value, it is a good idea to put a comment like that at the end of the line to make your intent clear. Conversely, if you do not want any whitespace characters at the end of your variable value, you must remember not to put a random comment on the end of the line after some whitespace, such as this:. This is called a conditional variable assignment operator, because it only has an effect if the variable is not yet defined.
This statement:. This section describes some advanced features you can use to reference variables in more flexible ways. A substitution reference substitutes the value of a variable with alterations that you specify.
See Setting Variables. We provide substitution references as well as patsubst for compatibility with other implementations of make. Another type of substitution reference lets you use the full power of the patsubst function. See Functions for String Substitution and Analysis , for a description of the patsubst function.
Computed variable names are a complicated concept needed only for sophisticated makefile programming. For most purposes you need not consider them, except to know that making a variable with a dollar sign in its name might have strange results.
However, if you are the type that wants to understand everything, or you are actually interested in what they do, read on. Variables may be referenced inside the name of a variable.
This is called a computed variable name or a nested variable reference. The previous example shows two levels of nesting, but any number of levels is possible. For example, here are three levels:. References to recursively-expanded variables within a variable name are re-expanded in the usual fashion. Nested variable references can also contain modified references and function invocations see Functions for Transforming Text , just like any other reference.
For example, using the subst function see Functions for String Substitution and Analysis :. A computed variable name need not consist entirely of a single variable reference. It can contain several variable references, as well as some invariant text. The only restriction on this sort of use of nested variable references is that they cannot specify part of the name of a function to be called.
This is because the test for a recognized function name is done before the expansion of nested references. This restriction could be removed in the future if that change is shown to be a good idea. You can also use computed variable names in the left-hand side of a variable assignment, or in a define directive, as in:.
Note that nested variable references are quite different from recursively expanded variables see The Two Flavors of Variables , though both are used together in complex ways when doing makefile programming. See The Two Flavors of Variables. The variable name may contain function and variable references, which are expanded when the line is read to find the actual variable name to use.
There is no limit on the length of the value of a variable except the amount of memory on the computer. You can split the value of a variable into multiple physical lines for readability see Splitting Long Lines.
Most variable names are considered to have the empty string as a value if you have never set them. Several variables have built-in initial values that are not empty, but you can set them in the usual ways see Variables Used by Implicit Rules. Several special variables are set automatically to a new value for each rule; these are called the automatic variables see Automatic Variables.
This operator first evaluates the right-hand side, then passes that result to the shell for execution. If the result of the execution ends in a newline, that one newline is removed; all other newlines are replaced by spaces. The resulting string is then placed into the named recursively-expanded variable. Alternatively, you can set a simply expanded variable to the result of running a program using the shell function call. As with the shell function, the exit status of the just-invoked shell script is stored in the.
Often it is useful to add more text to the value of a variable already defined. See The Two Flavors of Variables , for an explanation of the two flavors of variables. In fact,. Recall that when you define a recursively-expanded variable, make does not expand the value you set for variable and function references immediately. Instead it stores the text verbatim, and saves these variable and function references to be expanded later, when you refer to the new variable see The Two Flavors of Variables.
Take this common example:. Thus, includes need not be defined yet for its value to take effect. This is pretty close, but not quite what we want. If a variable has been set with a command argument see Overriding Variables , then ordinary assignments in the makefile are ignored. If you want to set the variable in the makefile even though it was set with a command argument, you can use an override directive, which is a line that looks like this:.
Variable assignments marked with the override flag have a higher priority than all other assignments, except another override. Subsequent assignments or appends to this variable which are not marked override will be ignored. The override directive was not invented for escalation in the war between makefiles and command arguments. It was invented so you can alter and add to values that the user specifies with command arguments. You could use this override directive:.
You can also use override directives with define directives. This is done as you might expect:. Another way to set the value of a variable is to use the define directive. This directive has an unusual syntax which allows newline characters to be included in the value, which is convenient for defining both canned sequences of commands see Defining Canned Recipes , and also sections of makefile syntax to use with eval see Eval Function.
The define directive is followed on the same line by the name of the variable being defined and an optional assignment operator, and nothing more. The value to give the variable appears on the following lines. The end of the value is marked by a line containing just the word endef.
Aside from this difference in syntax, define works just like any other variable definition. The variable name may contain function and variable references, which are expanded when the directive is read to find the actual variable name to use. The final newline before the endef is not included in the value; if you want your value to contain a trailing newline you must include a blank line. For example in order to define a variable that contains a newline character you must use two empty lines, not one:.
You may omit the variable assignment operator if you prefer. You may nest define directives: make will keep track of nested directives and report an error if they are not all properly closed with endef. Note that lines beginning with the recipe prefix character are considered part of a recipe, so any define or endef strings appearing on such a line will not be considered make directives.
However, note that using two separate lines means make will invoke the shell twice, running an independent sub-shell for each line. If you want variable definitions made with define to take precedence over command-line variable definitions, you can use the override directive together with define :. If you want to clear a variable, setting its value to empty is usually sufficient.
Expanding such a variable will yield the same result empty string regardless of whether it was set or not. However, if you are using the flavor see Flavor Function and origin see Origin Function functions, there is a difference between a variable that was never set and a variable with an empty value. In such situations you may want to use the undefine directive to make a variable appear as if it was never set. If you want to undefine a command-line variable definition, you can use the override directive together with undefine , similar to how this is done for variable definitions:.
Variables in make can come from the environment in which make is run. Every environment variable that make sees when it starts up is transformed into a make variable with the same name and value. However, an explicit assignment in the makefile, or with a command argument, overrides the environment. But this is not recommended practice. Thus, by setting the variable CFLAGS in your environment, you can cause all C compilations in most makefiles to use the compiler switches you prefer.
This is safe for variables with standard or conventional meanings because you know that no makefile will use them for other things. Note this is not totally reliable; some makefiles set CFLAGS explicitly and therefore are not affected by the value in the environment.
When make runs a recipe, variables defined in the makefile are placed into the environment of each shell. This allows you to pass values to sub- make invocations see Recursive Use of make.
By default, only variables that came from the environment or the command line are passed to recursive invocations. You can use the export directive to pass other variables.
See Communicating Variables to a Sub- make , for full details. Other use of variables from the environment is not recommended. It is not wise for makefiles to depend for their functioning on environment variables set up outside their control, since this would cause different users to get different results from the same makefile.
This is against the whole purpose of most makefiles. It would be very undesirable for this choice to affect make ; so, make handles the SHELL environment variable in a special way; see Choosing the Shell. One exception to that is automatic variables see Automatic Variables. The other exception is target-specific variable values. This feature allows you to define different values for the same variable, based on the target that make is currently building. Target-specific variable assignments can be prefixed with any or all of the special keywords export , override , or private ; these apply their normal behavior to this instance of the variable only.
Multiple target values create a target-specific variable value for each member of the target list individually. All variables that appear within the variable-assignment are evaluated within the context of the target: thus, any previously-defined target-specific variable values will be in effect. Target-specific variables have the same priority as any other makefile variable.
Specifying the override directive will allow the target-specific variable value to be preferred. There is one more special feature of target-specific variables: when you define a target-specific variable that variable value is also in effect for all prerequisites of this target, and all their prerequisites, etc. So, for example, a statement like this:. Be aware that a given prerequisite will only be built once per invocation of make, at most.
If the same file is a prerequisite of multiple targets, and each of those targets has a different value for the same target-specific variable, then the first target to be built will cause that prerequisite to be built and the prerequisite will inherit the target-specific value from the first target.
It will ignore the target-specific values from any other targets. In addition to target-specific variable values see Target-specific Variable Values , GNU make supports pattern-specific variable values. In this form, the variable is defined for any target that matches the pattern specified. As with target-specific variable values, multiple pattern values create a pattern-specific variable value for each pattern individually. The variable-assignment can be any valid form of assignment.
Any command line variable setting will take precedence, unless override is specified. If a target matches more than one pattern, the matching pattern-specific variables with longer stems are interpreted first. This results in more specific variables taking precedence over the more generic ones, for example:.
Pattern-specific variables which result in the same stem length are considered in the order in which they were defined in the makefile. Pattern-specific variables are searched after any target-specific variables defined explicitly for that target, and before target-specific variables defined for the parent target.
As described in previous sections, make variables are inherited by prerequisites. This capability allows you to modify the behavior of a prerequisite based on which targets caused it to be rebuilt. Sometimes, however, you may not want a variable to be inherited. For these situations, make provides the private modifier. Although this modifier can be used with any variable assignment, it makes the most sense with target- and pattern-specific variables.
Any variable marked private will be visible to its local target but will not be inherited by prerequisites of that target. A global variable marked private will be visible in the global scope but will not be inherited by any target, and hence will not be visible in any recipe.
Due to the private modifier, a. Contains the name of each makefile that is parsed by make , in the order in which it was parsed. The name is appended just before make begins to parse the makefile. Thus, if the first thing a makefile does is examine the last word in this variable, it will be the name of the current makefile. Once the current makefile has used include , however, the last word will be the just-included makefile.
Sets the default goal to be used if no targets were specified on the command line see Arguments to Specify the Goals. The following example illustrates these cases:. Note that assigning more than one target name to. This variable is set only if this instance of make has restarted see How Makefiles Are Remade : it will contain the number of times this instance has restarted. You should not set, modify, or export this variable. When make starts it will check whether stdout and stderr will show their output on a terminal.
If set these variables will be marked for export. These variables will not be changed by make and they will not be modified if already set. These values can be used particularly in combination with output synchronization see Output During Parallel Execution to determine whether make itself is writing to a terminal; they can be tested to decide whether to force recipe commands to generate colorized output for example.
If you invoke a sub- make and redirect its stdout or stderr it is your responsibility to reset or unexport these variables as well, if your makefiles rely on them. The first character of the value of this variable is used as the character make assumes is introducing a recipe line.
If the variable is empty as it is by default that character is the standard tab character. For example, this is a valid makefile:. The value of. Expands to a list of the names of all global variables defined so far.
This includes variables which have empty values, as well as built-in variables see Variables Used by Implicit Rules , but does not include any variables which are only defined in a target-specific context. Note that any value you assign to this variable will be ignored; it will always return its special value. Expands to a list of special features supported by this version of make.
Possible values include, but are not limited to:. Supports ar archive files using special file name syntax. See Using make to Update Archive Files. Supports the -L --check-symlink-times flag.
See Syntax of Conditionals. See Parallel Execution. Supports the. See Using One Shell. Supports order-only prerequisites. See Types of Prerequisites. See How Patterns Match. Supports target-specific and pattern-specific variable assignments.
See Target-specific Variable Values. Supports the undefine directive. See Undefine Directive. Has GNU Guile available as an embedded extension language. Supports dynamically loadable objects for creating custom extensions. See Loading Dynamic Objects. Expands to a list of directories that make searches for included makefiles see Including Other Makefiles. Each word in this variable is a new prerequisite which is added to targets for which it is set.
These prerequisites differ from normal prerequisites in that they do not appear in any of the automatic variables see Automatic Variables.
This allows prerequisites to be defined which do not impact the recipe. Now suppose you want to enhance this makefile to ensure that updates to the compiler cause the program to be re-linked. Then consider having multiple extra prerequisites: they would all have to be filtered out. This feature can also be useful if you want to add prerequisites to a makefile you cannot easily modify: you can create a new file such as extra.
Note make is smart enough not to add a prerequisite listed in. A conditional directive causes part of a makefile to be obeyed or ignored depending on the values of variables. Conditionals can compare the value of one variable to another, or the value of a variable to a constant string. It works by controlling which of two recipe lines will be used for the rule. This conditional uses three directives: one ifeq , one else and one endif. The ifeq directive begins the conditional, and specifies the condition.
It contains two arguments, separated by a comma and surrounded by parentheses. Variable substitution is performed on both arguments and then they are compared. The lines of the makefile following the ifeq are obeyed if the two arguments match; otherwise they are ignored. The else directive causes the following lines to be obeyed if the previous conditional failed. In the example above, this means that the second alternative linking command is used whenever the first alternative is not used.
It is optional to have an else in a conditional. The endif directive ends the conditional. Every conditional must end with an endif. Unconditional makefile text follows. As this example illustrates, conditionals work at the textual level: the lines of the conditional are treated as part of the makefile, or ignored, according to the condition. This is why the larger syntactic units of the makefile, such as rules, may cross the beginning or the end of the conditional.
Equivalent results can be obtained in another way by conditionalizing a variable assignment and then using the variable unconditionally:.
The text-if-true may be any lines of text, to be considered as part of the makefile if the condition is true. If the condition is false, no text is used instead. Once a given condition is true, text-if-true is used and no other clause is used; if no condition is true then text-if-false is used. The text-if-true and text-if-false can be any number of lines of text. The syntax of the conditional-directive is the same whether the conditional is simple or complex; after an else or not.
There are four different directives that test different conditions. Here is a table of them:. Expand all variable references in arg1 and arg2 and compare them.
If they are identical, the text-if-true is effective; otherwise, the text-if-false , if any, is effective.
Often you want to test if a variable has a non-empty value. When the value results from complex expansions of variables and functions, expansions you would consider empty may actually contain whitespace characters and thus are not seen as empty. However, you can use the strip function see Text Functions to avoid interpreting whitespace as a non-empty value. If they are different, the text-if-true is effective; otherwise, the text-if-false , if any, is effective.
The ifdef form takes the name of a variable as its argument, not a reference to a variable. If the value of that variable has a non-empty value, the text-if-true is effective; otherwise, the text-if-false , if any, is effective.
Variables that have never been defined have an empty value. The text variable-name is expanded, so it could be a variable or function that expands to the name of a variable.
The variable bar is not expanded, but its value is examined to determine if it is non-empty. Note that ifdef only tests whether a variable has a value. It does not expand the variable to see if that value is nonempty. If the variable variable-name has an empty value, the text-if-true is effective; otherwise, the text-if-false , if any, is effective. The rules for expansion and testing of variable-name are identical to the ifdef directive.
Extra spaces are allowed and ignored at the beginning of the conditional directive line, but a tab is not allowed. If the line begins with a tab, it will be considered part of a recipe for a rule. Aside from this, extra spaces or tabs may be inserted with no effect anywhere except within the directive name or within an argument.
The other two directives that play a part in a conditional are else and endif. Each of these directives is written as one word, with no arguments.
Extra spaces are allowed and ignored at the beginning of the line, and spaces or tabs at the end. Conditionals affect which lines of the makefile make uses.
If the condition is true, make reads the lines of the text-if-true as part of the makefile; if the condition is false, make ignores those lines completely. It follows that syntactic units of the makefile, such as rules, may safely be split across the beginning or the end of the conditional. Consequently, you cannot use automatic variables in the tests of conditionals because they are not defined until recipes are run see Automatic Variables.
To prevent intolerable confusion, it is not permitted to start a conditional in one makefile and end it in another. However, you may write an include directive within a conditional, provided you do not attempt to terminate the conditional inside the included file.
This is useful when touch is not enough to make a file appear up to date. The findstring function determines whether one string appears as a substring of another. See Recursive Use of make. Functions allow you to do text processing in the makefile to compute the files to operate on or the commands to use in recipes. You use a function in a function call , where you give the name of the function and some text the arguments for the function to operate on.
A function call resembles a variable reference. It can appear anywhere a variable reference can appear, and it is expanded using the same rules as variable references.
A function call looks like this:. Here function is a function name; one of a short list of names that are part of make. You can also essentially create your own functions by using the call built-in function.
The arguments are the arguments of the function. They are separated from the function name by one or more spaces or tabs, and if there is more than one argument, then they are separated by commas. The delimiters which you use to surround the function call, whether parentheses or braces, can appear in an argument only in matching pairs; the other kind of delimiters may appear singly.
The disadvantage is that compilation time is increased because the template code is being compiled repeatedly. Code written for this model tends to include definitions of all templates in the header file, since they must be seen to be instantiated. A more modern version of the repository works as follows: As individual object files are built, the compiler places any template definitions and instantiations encountered in the repository.
At link time, the link wrapper adds in the objects in the repository and compiles any needed instances that were not previously emitted. The advantages of this model are more optimal compilation speed and the ability to use the system linker; to implement the Borland model a compiler vendor also needs to replace the linker.
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